1. Field of the Invention
The present invention relates generally to pipelined analog-to-digital converters.
2. Description of the Related Art
Modern pipelined analog-to-digital converter (ADC) systems can obtain high resolution and high speed in converting analog input signals Sin to digital output signals Sout. These systems realize their resolution and speed by pipelining input signals along succeeding converter stages.
These systems, however, are prone to generate code errors at the transition steps of digital-to-analog converters (DACs) in the succeeding converter stages. Although succeeding DACs have been slaved to preceding DACs in attempts to reduce these errors, these efforts have generally failed to eliminate the problem.
The present invention is directed to pipelined ADC system embodiments which provide gain matching structures that substantially eliminate gain errors between preceding and succeeding converter stages.
The invention recognizes that gain across main signal-conditioning elements of pipelined ADC systems will vary with process and temperature variations and generate code errors in digital output signals Sout. In response to this recognition, the invention provides reference signal-conditioning elements that mimic at least one of the main signal-conditioning elements. The reference signal-conditioning elements control a reference signal to a succeeding digital-to-analog converter (DAC) so that a match is maintained between the full-scale range of the succeeding DAC and the xe2x80x9cgained-upxe2x80x9d step size of a preceding DAC. This match substantially eliminates the code errors.